VHDL-AMS Tutorial

VHDL-AMS Tutorial


This training tool was created as task of the project REASON by
N. DREWS, T. VANGELOV, D. WUTTKE (CR8-TUI).
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The tutorial is an introduction to the implementation of analogue and mixed signal models with the VHDL-AMS description language.


It was not possible to get a low cost simulation software with support for script-controlled simulation. So you have to download and install the simulator on your own computer. You may only be able to use parts of the tutorial if you are logged in as guest. Sorry for that.


The tutorial contains the following parts:



To get started with VHDL-AMS you have to do the following steps: